In designing systems, such as cellular communication system, it is often necessary to have the various components in synchronous timing with one another. Particularly if a time based protocol is used, such as Time Division Multiplexing (TDM) or Time Division Multiple Access (TDMA). To accomplish this timing, there is typically a reference to which each of the system nodes, or base sites in a cellular communication system, are synchronized.
This synchronization can be accomplished through various techniques such as through the use of a Global Positioning System (GPS). However, because of the expense associated with such a design, more economical means are often needed. One more economical means is to have a master clock from a master node that will transmit a pulse to various slave nodes. This would then require a PLL design that can utilize the master clock signal to adjust the slaves timing.